mirror of
https://github.com/love2d/megasource.git
synced 2026-08-20 12:40:06 +02:00
Update LuaJIT to the latest 2.1.0 source (f3c8569)
This commit is contained in:
Alex Szpakowski
+143
-93
@@ -1,6 +1,6 @@
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/*
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** MIPS IR assembler (SSA IR -> machine code).
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** Copyright (C) 2005-2020 Mike Pall. See Copyright Notice in luajit.h
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** Copyright (C) 2005-2021 Mike Pall. See Copyright Notice in luajit.h
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*/
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/* -- Register allocator extensions --------------------------------------- */
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@@ -64,19 +64,31 @@ static Reg ra_alloc2(ASMState *as, IRIns *ir, RegSet allow)
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/* Setup spare long-range jump slots per mcarea. */
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static void asm_sparejump_setup(ASMState *as)
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{
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MCode *mxp = as->mcbot;
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if (((uintptr_t)mxp & (LJ_PAGESIZE-1)) == sizeof(MCLink)) {
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MCode *mxp = as->mctop;
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if ((char *)mxp == (char *)as->J->mcarea + as->J->szmcarea) {
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mxp -= MIPS_SPAREJUMP*2;
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lj_assertA(MIPSI_NOP == 0, "bad NOP");
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memset(mxp, 0, MIPS_SPAREJUMP*2*sizeof(MCode));
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mxp += MIPS_SPAREJUMP*2;
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lj_assertA(mxp < as->mctop, "MIPS_SPAREJUMP too big");
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lj_mcode_sync(as->mcbot, mxp);
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lj_mcode_commitbot(as->J, mxp);
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as->mcbot = mxp;
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as->mclim = as->mcbot + MCLIM_REDZONE;
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as->mctop = mxp;
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}
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}
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static MCode *asm_sparejump_use(MCode *mcarea, MCode tjump)
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{
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MCode *mxp = (MCode *)((char *)mcarea + ((MCLink *)mcarea)->size);
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int slot = MIPS_SPAREJUMP;
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while (slot--) {
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mxp -= 2;
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if (*mxp == tjump) {
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return mxp;
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} else if (*mxp == MIPSI_NOP) {
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*mxp = tjump;
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return mxp;
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}
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}
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return NULL;
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}
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/* Setup exit stub after the end of each trace. */
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static void asm_exitstub_setup(ASMState *as)
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{
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@@ -181,6 +193,9 @@ static Reg asm_fuseahuref(ASMState *as, IRRef ref, int32_t *ofsp, RegSet allow)
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return ra_allock(as, ofs-(int16_t)ofs, allow);
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}
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}
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} else if (ir->o == IR_TMPREF) {
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*ofsp = (int32_t)(offsetof(global_State, tmptv)-32768);
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return RID_JGL;
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}
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}
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*ofsp = 0;
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@@ -336,19 +351,15 @@ static void asm_gencall(ASMState *as, const CCallInfo *ci, IRRef *args)
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static void asm_setupresult(ASMState *as, IRIns *ir, const CCallInfo *ci)
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{
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RegSet drop = RSET_SCRATCH;
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#if LJ_32
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int hiop = ((ir+1)->o == IR_HIOP && !irt_isnil((ir+1)->t));
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#endif
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#if !LJ_SOFTFP
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if ((ci->flags & CCI_NOFPRCLOBBER))
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drop &= ~RSET_FPR;
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#endif
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if (ra_hasreg(ir->r))
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rset_clear(drop, ir->r); /* Dest reg handled below. */
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#if LJ_32
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if (hiop && ra_hasreg((ir+1)->r))
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rset_clear(drop, (ir+1)->r); /* Dest reg handled below. */
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#endif
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ra_evictset(as, drop); /* Evictions must be performed first. */
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if (ra_used(ir)) {
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lj_assertA(!irt_ispri(ir->t), "PRI dest");
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@@ -377,10 +388,8 @@ static void asm_setupresult(ASMState *as, IRIns *ir, const CCallInfo *ci)
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} else {
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ra_destreg(as, ir, RID_FPRET);
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}
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#if LJ_32
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} else if (hiop) {
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ra_destpair(as, ir);
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#endif
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} else {
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ra_destreg(as, ir, RID_RET);
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}
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@@ -450,6 +459,27 @@ static void asm_retf(ASMState *as, IRIns *ir)
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emit_tsi(as, MIPSI_AL, RID_TMP, base, -8);
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}
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/* -- Buffer operations --------------------------------------------------- */
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#if LJ_HASBUFFER
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static void asm_bufhdr_write(ASMState *as, Reg sb)
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{
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Reg tmp = ra_scratch(as, rset_exclude(RSET_GPR, sb));
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IRIns irgc;
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irgc.ot = IRT(0, IRT_PGC); /* GC type. */
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emit_storeofs(as, &irgc, RID_TMP, sb, offsetof(SBuf, L));
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if ((as->flags & JIT_F_MIPSXXR2)) {
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emit_tsml(as, LJ_64 ? MIPSI_DINS : MIPSI_INS, RID_TMP, tmp,
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lj_fls(SBUF_MASK_FLAG), 0);
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} else {
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emit_dst(as, MIPSI_OR, RID_TMP, RID_TMP, tmp);
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emit_tsi(as, MIPSI_ANDI, tmp, tmp, SBUF_MASK_FLAG);
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}
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emit_getgl(as, RID_TMP, cur_L);
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emit_loadofs(as, &irgc, tmp, sb, offsetof(SBuf, L));
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}
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#endif
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/* -- Type conversions ---------------------------------------------------- */
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#if !LJ_SOFTFP
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@@ -739,7 +769,7 @@ static void asm_conv(ASMState *as, IRIns *ir)
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}
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}
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} else {
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if (st64) {
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if (st64 && !(ir->op2 & IRCONV_NONE)) {
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/* This is either a 32 bit reg/reg mov which zeroes the hiword
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** or a load of the loword from a 64 bit address.
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*/
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@@ -827,34 +857,63 @@ static void asm_tvstore64(ASMState *as, Reg base, int32_t ofs, IRRef ref)
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#endif
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/* Get pointer to TValue. */
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static void asm_tvptr(ASMState *as, Reg dest, IRRef ref)
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static void asm_tvptr(ASMState *as, Reg dest, IRRef ref, MSize mode)
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{
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IRIns *ir = IR(ref);
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if (irt_isnum(ir->t)) {
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if (irref_isk(ref)) /* Use the number constant itself as a TValue. */
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ra_allockreg(as, igcptr(ir_knum(ir)), dest);
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else /* Otherwise force a spill and use the spill slot. */
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emit_tsi(as, MIPSI_AADDIU, dest, RID_SP, ra_spill(as, ir));
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} else {
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/* Otherwise use g->tmptv to hold the TValue. */
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#if LJ_32
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RegSet allow = rset_exclude(RSET_GPR, dest);
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Reg type;
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emit_tsi(as, MIPSI_ADDIU, dest, RID_JGL, (int32_t)(offsetof(global_State, tmptv)-32768));
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if (!irt_ispri(ir->t)) {
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Reg src = ra_alloc1(as, ref, allow);
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emit_setgl(as, src, tmptv.gcr);
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}
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if (LJ_SOFTFP && (ir+1)->o == IR_HIOP)
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type = ra_alloc1(as, ref+1, allow);
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else
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type = ra_allock(as, (int32_t)irt_toitype(ir->t), allow);
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emit_setgl(as, type, tmptv.it);
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int32_t tmpofs = (int32_t)(offsetof(global_State, tmptv)-32768);
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if ((mode & IRTMPREF_IN1)) {
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IRIns *ir = IR(ref);
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if (irt_isnum(ir->t)) {
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if ((mode & IRTMPREF_OUT1)) {
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#if LJ_SOFTFP
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emit_tsi(as, MIPSI_AADDIU, dest, RID_JGL, tmpofs);
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#if LJ_64
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emit_setgl(as, ra_alloc1(as, ref, RSET_GPR), tmptv.u64);
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#else
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asm_tvstore64(as, dest, 0, ref);
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emit_tsi(as, MIPSI_DADDIU, dest, RID_JGL,
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(int32_t)(offsetof(global_State, tmptv)-32768));
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lj_assertA(irref_isk(ref), "unsplit FP op");
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emit_setgl(as,
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ra_allock(as, (int32_t)ir_knum(ir)->u32.lo, RSET_GPR),
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tmptv.u32.lo);
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emit_setgl(as,
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ra_allock(as, (int32_t)ir_knum(ir)->u32.hi, RSET_GPR),
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tmptv.u32.hi);
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#endif
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#else
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Reg src = ra_alloc1(as, ref, RSET_FPR);
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emit_tsi(as, MIPSI_AADDIU, dest, RID_JGL, tmpofs);
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emit_tsi(as, MIPSI_SDC1, (src & 31), RID_JGL, tmpofs);
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#endif
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} else if (irref_isk(ref)) {
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/* Use the number constant itself as a TValue. */
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ra_allockreg(as, igcptr(ir_knum(ir)), dest);
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} else {
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#if LJ_SOFTFP32
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lj_assertA(0, "unsplit FP op");
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#else
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/* Otherwise force a spill and use the spill slot. */
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emit_tsi(as, MIPSI_AADDIU, dest, RID_SP, ra_spill(as, ir));
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#endif
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}
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} else {
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/* Otherwise use g->tmptv to hold the TValue. */
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#if LJ_32
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Reg type;
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emit_tsi(as, MIPSI_ADDIU, dest, RID_JGL, tmpofs);
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if (!irt_ispri(ir->t)) {
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Reg src = ra_alloc1(as, ref, RSET_GPR);
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emit_setgl(as, src, tmptv.gcr);
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}
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if (LJ_SOFTFP && (ir+1)->o == IR_HIOP && !irt_isnil((ir+1)->t))
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type = ra_alloc1(as, ref+1, RSET_GPR);
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else
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type = ra_allock(as, (int32_t)irt_toitype(ir->t), RSET_GPR);
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emit_setgl(as, type, tmptv.it);
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#else
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asm_tvstore64(as, dest, 0, ref);
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emit_tsi(as, MIPSI_DADDIU, dest, RID_JGL, tmpofs);
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#endif
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}
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} else {
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emit_tsi(as, MIPSI_AADDIU, dest, RID_JGL, tmpofs);
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}
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}
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@@ -909,11 +968,16 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
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MCLabel l_end, l_loop, l_next;
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rset_clear(allow, tab);
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#if LJ_SOFTFP32
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if (!isk) {
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key = ra_alloc1(as, refkey, allow);
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rset_clear(allow, key);
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if (irkey[1].o == IR_HIOP) {
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if (!LJ_SOFTFP && irt_isnum(kt)) {
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key = ra_alloc1(as, refkey, RSET_FPR);
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tmpnum = ra_scratch(as, rset_exclude(RSET_FPR, key));
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} else {
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if (!irt_ispri(kt)) {
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key = ra_alloc1(as, refkey, allow);
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rset_clear(allow, key);
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}
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#if LJ_32
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if (LJ_SOFTFP && irkey[1].o == IR_HIOP) {
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if (ra_hasreg((irkey+1)->r)) {
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type = tmpnum = (irkey+1)->r;
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tmp1 = ra_scratch(as, allow);
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@@ -924,23 +988,11 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
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}
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rset_clear(allow, tmpnum);
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} else {
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type = ra_allock(as, (int32_t)irt_toitype(irkey->t), allow);
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type = ra_allock(as, (int32_t)irt_toitype(kt), allow);
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rset_clear(allow, type);
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}
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}
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#else
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if (!LJ_SOFTFP && irt_isnum(kt)) {
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key = ra_alloc1(as, refkey, RSET_FPR);
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tmpnum = ra_scratch(as, rset_exclude(RSET_FPR, key));
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} else if (!irt_ispri(kt)) {
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key = ra_alloc1(as, refkey, allow);
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rset_clear(allow, key);
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#if LJ_32
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type = ra_allock(as, (int32_t)irt_toitype(irkey->t), allow);
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rset_clear(allow, type);
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#endif
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}
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#endif
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tmp2 = ra_scratch(as, allow);
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rset_clear(allow, tmp2);
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#if LJ_64
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@@ -953,10 +1005,10 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
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} else {
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int64_t k;
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if (isk && irt_isaddr(kt)) {
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k = ((int64_t)irt_toitype(irkey->t) << 47) | irkey[1].tv.u64;
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k = ((int64_t)irt_toitype(kt) << 47) | irkey[1].tv.u64;
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} else {
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lj_assertA(irt_ispri(kt) && !irt_isnil(kt), "bad HREF key type");
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k = ~((int64_t)~irt_toitype(ir->t) << 47);
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k = ~((int64_t)~irt_toitype(kt) << 47);
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}
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cmp64 = ra_allock(as, k, allow);
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rset_clear(allow, cmp64);
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@@ -1352,6 +1404,7 @@ static void asm_ahuvload(ASMState *as, IRIns *ir)
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#endif
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}
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idx = asm_fuseahuref(as, ir->op1, &ofs, allow);
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if (ir->o == IR_VLOAD) ofs += 8 * ir->op2;
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rset_clear(allow, idx);
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if (irt_isnum(t)) {
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asm_guard(as, MIPSI_BEQ, RID_TMP, RID_ZERO);
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@@ -2327,15 +2380,15 @@ static void asm_comp64eq(ASMState *as, IRIns *ir)
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}
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#endif
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/* -- Support for 64 bit ops in 32 bit mode ------------------------------- */
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/* -- Split register ops -------------------------------------------------- */
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/* Hiword op of a split 64 bit op. Previous op must be the loword op. */
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/* Hiword op of a split 32/32 or 64/64 bit op. Previous op is the loword op. */
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static void asm_hiop(ASMState *as, IRIns *ir)
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{
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#if LJ_32 && (LJ_HASFFI || LJ_SOFTFP)
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/* HIOP is marked as a store because it needs its own DCE logic. */
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int uselo = ra_used(ir-1), usehi = ra_used(ir); /* Loword/hiword used? */
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if (LJ_UNLIKELY(!(as->flags & JIT_F_OPT_DCE))) uselo = usehi = 1;
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#if LJ_32 && (LJ_HASFFI || LJ_SOFTFP)
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if ((ir-1)->o == IR_CONV) { /* Conversions to/from 64 bit. */
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as->curins--; /* Always skip the CONV. */
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#if LJ_HASFFI && !LJ_SOFTFP
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@@ -2382,38 +2435,33 @@ static void asm_hiop(ASMState *as, IRIns *ir)
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}
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return;
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}
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#endif
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if (!usehi) return; /* Skip unused hiword op for all remaining ops. */
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switch ((ir-1)->o) {
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#if LJ_HASFFI
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#if LJ_32 && LJ_HASFFI
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case IR_ADD: as->curins--; asm_add64(as, ir); break;
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case IR_SUB: as->curins--; asm_sub64(as, ir); break;
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case IR_NEG: as->curins--; asm_neg64(as, ir); break;
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case IR_CNEWI:
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/* Nothing to do here. Handled by lo op itself. */
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break;
|
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#endif
|
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#if LJ_SOFTFP
|
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#if LJ_32 && LJ_SOFTFP
|
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case IR_SLOAD: case IR_ALOAD: case IR_HLOAD: case IR_ULOAD: case IR_VLOAD:
|
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case IR_STRTO:
|
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if (!uselo)
|
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ra_allocref(as, ir->op1, RSET_GPR); /* Mark lo op as used. */
|
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break;
|
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case IR_ASTORE: case IR_HSTORE: case IR_USTORE: case IR_TOSTR: case IR_TMPREF:
|
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/* Nothing to do here. Handled by lo op itself. */
|
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break;
|
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#endif
|
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case IR_CALLN:
|
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case IR_CALLS:
|
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case IR_CALLXS:
|
||||
case IR_CALLN: case IR_CALLL: case IR_CALLS: case IR_CALLXS:
|
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if (!uselo)
|
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ra_allocref(as, ir->op1, RID2RSET(RID_RETLO)); /* Mark lo op as used. */
|
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break;
|
||||
#if LJ_SOFTFP
|
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case IR_ASTORE: case IR_HSTORE: case IR_USTORE: case IR_TOSTR:
|
||||
#endif
|
||||
case IR_CNEWI:
|
||||
/* Nothing to do here. Handled by lo op itself. */
|
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break;
|
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default: lj_assertA(0, "bad HIOP for op %d", (ir-1)->o); break;
|
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}
|
||||
#else
|
||||
/* Unused on MIPS64 or without SOFTFP or FFI. */
|
||||
UNUSED(as); UNUSED(ir); lj_assertA(0, "unexpected HIOP");
|
||||
#endif
|
||||
}
|
||||
|
||||
/* -- Profiling ----------------------------------------------------------- */
|
||||
@@ -2513,6 +2561,8 @@ static void asm_stack_restore(ASMState *as, SnapShot *snap)
|
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} else if ((sn & SNAP_SOFTFPNUM)) {
|
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type = ra_alloc1(as, ref+1, rset_exclude(RSET_GPR, RID_BASE));
|
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#endif
|
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} else if ((sn & SNAP_KEYINDEX)) {
|
||||
type = ra_allock(as, (int32_t)LJ_KEYINDEX, allow);
|
||||
} else {
|
||||
type = ra_allock(as, (int32_t)irt_toitype(ir->t), allow);
|
||||
}
|
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@@ -2575,6 +2625,12 @@ static void asm_loop_fixup(ASMState *as)
|
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}
|
||||
}
|
||||
|
||||
/* Fixup the tail of the loop. */
|
||||
static void asm_loop_tail_fixup(ASMState *as)
|
||||
{
|
||||
if (as->loopinv) as->mctop--;
|
||||
}
|
||||
|
||||
/* -- Head of trace ------------------------------------------------------- */
|
||||
|
||||
/* Coalesce BASE register for a root trace. */
|
||||
@@ -2582,7 +2638,6 @@ static void asm_head_root_base(ASMState *as)
|
||||
{
|
||||
IRIns *ir = IR(REF_BASE);
|
||||
Reg r = ir->r;
|
||||
if (as->loopinv) as->mctop--;
|
||||
if (ra_hasreg(r)) {
|
||||
ra_free(as, r);
|
||||
if (rset_test(as->modset, r) || irt_ismarked(ir->t))
|
||||
@@ -2597,7 +2652,6 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow)
|
||||
{
|
||||
IRIns *ir = IR(REF_BASE);
|
||||
Reg r = ir->r;
|
||||
if (as->loopinv) as->mctop--;
|
||||
if (ra_hasreg(r)) {
|
||||
ra_free(as, r);
|
||||
if (rset_test(as->modset, r) || irt_ismarked(ir->t))
|
||||
@@ -2704,21 +2758,17 @@ void lj_asm_patchexit(jit_State *J, GCtrace *T, ExitNo exitno, MCode *target)
|
||||
patchbranch:
|
||||
p[-1] = (p[-1] & 0xffff0000u) | (delta & 0xffffu);
|
||||
*p = MIPSI_NOP; /* Replace the load of the exit number. */
|
||||
cstop = p;
|
||||
cstop = p+1;
|
||||
if (!cstart) cstart = p-1;
|
||||
} else { /* Branch out of range. Use spare jump slot in mcarea. */
|
||||
int i;
|
||||
for (i = (int)(sizeof(MCLink)/sizeof(MCode));
|
||||
i < (int)(sizeof(MCLink)/sizeof(MCode)+MIPS_SPAREJUMP*2);
|
||||
i += 2) {
|
||||
if (mcarea[i] == tjump) {
|
||||
delta = mcarea+i - p;
|
||||
goto patchbranch;
|
||||
} else if (mcarea[i] == MIPSI_NOP) {
|
||||
mcarea[i] = tjump;
|
||||
cstart = mcarea+i;
|
||||
delta = mcarea+i - p;
|
||||
MCode *mcjump = asm_sparejump_use(mcarea, tjump);
|
||||
if (mcjump) {
|
||||
lj_mcode_sync(mcjump, mcjump+1);
|
||||
delta = mcjump - p;
|
||||
if (((delta + 0x8000) >> 16) == 0) {
|
||||
goto patchbranch;
|
||||
} else {
|
||||
lj_assertJ(0, "spare jump out of range: -Osizemcode too big");
|
||||
}
|
||||
}
|
||||
/* Ignore jump slot overflow. Child trace is simply not attached. */
|
||||
|
||||
Reference in New Issue
Block a user