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https://github.com/love2d/megasource.git
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Update LuaJIT to the latest 2.1.0 source (f3c8569)
This commit is contained in:
Alex Szpakowski
@@ -1,6 +1,6 @@
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/*
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** ARM64 IR assembler (SSA IR -> machine code).
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** Copyright (C) 2005-2020 Mike Pall. See Copyright Notice in luajit.h
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** Copyright (C) 2005-2021 Mike Pall. See Copyright Notice in luajit.h
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**
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** Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
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** Sponsored by Cisco Systems, Inc.
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@@ -198,6 +198,9 @@ static Reg asm_fuseahuref(ASMState *as, IRRef ref, int32_t *ofsp, RegSet allow,
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return RID_GL;
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}
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}
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} else if (ir->o == IR_TMPREF) {
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*ofsp = (int32_t)glofs(as, &J2G(as->J)->tmptv);
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return RID_GL;
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}
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}
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*ofsp = 0;
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@@ -457,8 +460,11 @@ static void asm_gencall(ASMState *as, const CCallInfo *ci, IRRef *args)
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static void asm_setupresult(ASMState *as, IRIns *ir, const CCallInfo *ci)
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{
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RegSet drop = RSET_SCRATCH;
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int hiop = ((ir+1)->o == IR_HIOP && !irt_isnil((ir+1)->t));
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if (ra_hasreg(ir->r))
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rset_clear(drop, ir->r); /* Dest reg handled below. */
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if (hiop && ra_hasreg((ir+1)->r))
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rset_clear(drop, (ir+1)->r); /* Dest reg handled below. */
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ra_evictset(as, drop); /* Evictions must be performed first. */
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if (ra_used(ir)) {
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lj_assertA(!irt_ispri(ir->t), "PRI dest");
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@@ -470,6 +476,8 @@ static void asm_setupresult(ASMState *as, IRIns *ir, const CCallInfo *ci)
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} else {
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ra_destreg(as, ir, RID_FPRET);
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}
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} else if (hiop) {
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ra_destpair(as, ir);
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} else {
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ra_destreg(as, ir, RID_RET);
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}
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@@ -519,6 +527,21 @@ static void asm_retf(ASMState *as, IRIns *ir)
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emit_lso(as, A64I_LDRx, RID_TMP, base, -8);
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}
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/* -- Buffer operations --------------------------------------------------- */
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#if LJ_HASBUFFER
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static void asm_bufhdr_write(ASMState *as, Reg sb)
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{
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Reg tmp = ra_scratch(as, rset_exclude(RSET_GPR, sb));
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IRIns irgc;
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irgc.ot = IRT(0, IRT_PGC); /* GC type. */
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emit_storeofs(as, &irgc, RID_TMP, sb, offsetof(SBuf, L));
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emit_dn(as, A64I_BFMx | A64F_IMMS(lj_fls(SBUF_MASK_FLAG)) | A64F_IMMR(0), RID_TMP, tmp);
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emit_getgl(as, RID_TMP, cur_L);
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emit_loadofs(as, &irgc, tmp, sb, offsetof(SBuf, L));
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}
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#endif
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/* -- Type conversions ---------------------------------------------------- */
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static void asm_tointg(ASMState *as, IRIns *ir, Reg left)
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@@ -602,7 +625,7 @@ static void asm_conv(ASMState *as, IRIns *ir)
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emit_dn(as, A64I_SXTW, dest, left);
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}
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} else {
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if (st64) {
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if (st64 && !(ir->op2 & IRCONV_NONE)) {
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/* This is either a 32 bit reg/reg mov which zeroes the hiword
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** or a load of the loword from a 64 bit address.
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*/
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@@ -675,22 +698,23 @@ static void asm_tvstore64(ASMState *as, Reg base, int32_t ofs, IRRef ref)
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}
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/* Get pointer to TValue. */
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static void asm_tvptr(ASMState *as, Reg dest, IRRef ref)
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static void asm_tvptr(ASMState *as, Reg dest, IRRef ref, MSize mode)
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{
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IRIns *ir = IR(ref);
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if (irt_isnum(ir->t)) {
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if (irref_isk(ref)) {
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/* Use the number constant itself as a TValue. */
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ra_allockreg(as, i64ptr(ir_knum(ir)), dest);
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if ((mode & IRTMPREF_IN1)) {
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IRIns *ir = IR(ref);
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if (irt_isnum(ir->t)) {
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if (irref_isk(ref) && !(mode & IRTMPREF_OUT1)) {
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/* Use the number constant itself as a TValue. */
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ra_allockreg(as, i64ptr(ir_knum(ir)), dest);
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return;
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}
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emit_lso(as, A64I_STRd, (ra_alloc1(as, ref, RSET_FPR) & 31), dest, 0);
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} else {
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/* Otherwise force a spill and use the spill slot. */
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emit_opk(as, A64I_ADDx, dest, RID_SP, ra_spill(as, ir), RSET_GPR);
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asm_tvstore64(as, dest, 0, ref);
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}
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} else {
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/* Otherwise use g->tmptv to hold the TValue. */
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asm_tvstore64(as, dest, 0, ref);
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ra_allockreg(as, i64ptr(&J2G(as->J)->tmptv), dest);
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}
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/* g->tmptv holds the TValue(s). */
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emit_dn(as, A64I_ADDx^emit_isk12(glofs(as, &J2G(as->J)->tmptv)), dest, RID_GL);
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}
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static void asm_aref(ASMState *as, IRIns *ir)
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@@ -767,7 +791,7 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
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}
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} else if (irt_isaddr(kt)) {
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if (isk) {
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int64_t kk = ((int64_t)irt_toitype(irkey->t) << 47) | irkey[1].tv.u64;
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int64_t kk = ((int64_t)irt_toitype(kt) << 47) | irkey[1].tv.u64;
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scr = ra_allock(as, kk, allow);
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} else {
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scr = ra_scratch(as, allow);
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@@ -775,7 +799,7 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
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rset_clear(allow, scr);
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} else {
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lj_assertA(irt_ispri(kt) && !irt_isnil(kt), "bad HREF key type");
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type = ra_allock(as, ~((int64_t)~irt_toitype(ir->t) << 47), allow);
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type = ra_allock(as, ~((int64_t)~irt_toitype(kt) << 47), allow);
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scr = ra_scratch(as, rset_clear(allow, type));
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rset_clear(allow, scr);
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}
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@@ -824,7 +848,7 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
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emit_lso(as, A64I_LDRx, scr, dest, offsetof(Node, key.u64));
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}
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} else {
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emit_nm(as, A64I_CMPw, scr, type);
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emit_nm(as, A64I_CMPx, scr, type);
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emit_lso(as, A64I_LDRx, scr, dest, offsetof(Node, key));
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}
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@@ -1059,6 +1083,7 @@ static void asm_ahuvload(ASMState *as, IRIns *ir)
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}
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type = ra_scratch(as, rset_clear(gpr, tmp));
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idx = asm_fuseahuref(as, ir->op1, &ofs, rset_clear(gpr, type), A64I_LDRx);
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if (ir->o == IR_VLOAD) ofs += 8 * ir->op2;
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/* Always do the type check, even if the load result is unused. */
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asm_guardcc(as, irt_isnum(ir->t) ? CC_LS : CC_NE);
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if (irt_type(ir->t) >= IRT_NUM) {
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@@ -1261,17 +1286,13 @@ static void asm_tbar(ASMState *as, IRIns *ir)
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{
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Reg tab = ra_alloc1(as, ir->op1, RSET_GPR);
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Reg link = ra_scratch(as, rset_exclude(RSET_GPR, tab));
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Reg gr = ra_allock(as, i64ptr(J2G(as->J)),
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rset_exclude(rset_exclude(RSET_GPR, tab), link));
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Reg mark = RID_TMP;
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MCLabel l_end = emit_label(as);
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emit_lso(as, A64I_STRx, link, tab, (int32_t)offsetof(GCtab, gclist));
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emit_lso(as, A64I_STRB, mark, tab, (int32_t)offsetof(GCtab, marked));
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emit_lso(as, A64I_STRx, tab, gr,
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(int32_t)offsetof(global_State, gc.grayagain));
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emit_setgl(as, tab, gc.grayagain);
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emit_dn(as, A64I_ANDw^emit_isk13(~LJ_GC_BLACK, 0), mark, mark);
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emit_lso(as, A64I_LDRx, link, gr,
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(int32_t)offsetof(global_State, gc.grayagain));
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emit_getgl(as, link, gc.grayagain);
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emit_cond_branch(as, CC_EQ, l_end);
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emit_n(as, A64I_TSTw^emit_isk13(LJ_GC_BLACK, 0), mark);
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emit_lso(as, A64I_LDRB, mark, tab, (int32_t)offsetof(GCtab, marked));
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@@ -1291,7 +1312,7 @@ static void asm_obar(ASMState *as, IRIns *ir)
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args[0] = ASMREF_TMP1; /* global_State *g */
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args[1] = ir->op1; /* TValue *tv */
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asm_gencall(as, ci, args);
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ra_allockreg(as, i64ptr(J2G(as->J)), ra_releasetmp(as, ASMREF_TMP1) );
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emit_dm(as, A64I_MOVx, ra_releasetmp(as, ASMREF_TMP1), RID_GL);
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obj = IR(ir->op1)->r;
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tmp = ra_scratch(as, rset_exclude(allow, obj));
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emit_cond_branch(as, CC_EQ, l_end);
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@@ -1704,13 +1725,25 @@ static void asm_comp(ASMState *as, IRIns *ir)
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#define asm_equal(as, ir) asm_comp(as, ir)
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/* -- Support for 64 bit ops in 32 bit mode ------------------------------- */
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/* -- Split register ops -------------------------------------------------- */
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/* Hiword op of a split 64 bit op. Previous op must be the loword op. */
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/* Hiword op of a split 64/64 bit op. Previous op is the loword op. */
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static void asm_hiop(ASMState *as, IRIns *ir)
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{
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UNUSED(as); UNUSED(ir);
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lj_assertA(0, "unexpected HIOP"); /* Unused on 64 bit. */
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/* HIOP is marked as a store because it needs its own DCE logic. */
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int uselo = ra_used(ir-1), usehi = ra_used(ir); /* Loword/hiword used? */
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if (LJ_UNLIKELY(!(as->flags & JIT_F_OPT_DCE))) uselo = usehi = 1;
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if (!usehi) return; /* Skip unused hiword op for all remaining ops. */
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switch ((ir-1)->o) {
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case IR_CALLN:
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case IR_CALLL:
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case IR_CALLS:
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case IR_CALLXS:
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if (!uselo)
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ra_allocref(as, ir->op1, RID2RSET(RID_RETLO)); /* Mark lo op as used. */
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break;
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default: lj_assertA(0, "bad HIOP for op %d", (ir-1)->o); break;
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}
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}
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/* -- Profiling ----------------------------------------------------------- */
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@@ -1781,7 +1814,14 @@ static void asm_stack_restore(ASMState *as, SnapShot *snap)
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IRIns *ir = IR(ref);
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if ((sn & SNAP_NORESTORE))
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continue;
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if (irt_isnum(ir->t)) {
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if ((sn & SNAP_KEYINDEX)) {
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RegSet allow = rset_exclude(RSET_GPR, RID_BASE);
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Reg r = irref_isk(ref) ? ra_allock(as, ir->i, allow) :
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ra_alloc1(as, ref, allow);
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rset_clear(allow, r);
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emit_lso(as, A64I_STRw, r, RID_BASE, ofs);
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emit_lso(as, A64I_STRw, ra_allock(as, LJ_KEYINDEX, allow), RID_BASE, ofs+4);
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} else if (irt_isnum(ir->t)) {
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Reg src = ra_alloc1(as, ref, RSET_FPR);
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emit_lso(as, A64I_STRd, (src & 31), RID_BASE, ofs);
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} else {
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@@ -1804,7 +1844,7 @@ static void asm_gc_check(ASMState *as)
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const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_gc_step_jit];
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IRRef args[2];
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MCLabel l_end;
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Reg tmp1, tmp2;
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Reg tmp2;
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ra_evictset(as, RSET_SCRATCH);
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l_end = emit_label(as);
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/* Exit trace if in GCSatomic or GCSfinalize. Avoids syncing GC objects. */
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@@ -1813,17 +1853,14 @@ static void asm_gc_check(ASMState *as)
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args[0] = ASMREF_TMP1; /* global_State *g */
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args[1] = ASMREF_TMP2; /* MSize steps */
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asm_gencall(as, ci, args);
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tmp1 = ra_releasetmp(as, ASMREF_TMP1);
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emit_dm(as, A64I_MOVx, ra_releasetmp(as, ASMREF_TMP1), RID_GL);
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tmp2 = ra_releasetmp(as, ASMREF_TMP2);
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emit_loadi(as, tmp2, as->gcsteps);
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/* Jump around GC step if GC total < GC threshold. */
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emit_cond_branch(as, CC_LS, l_end);
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emit_nm(as, A64I_CMPx, RID_TMP, tmp2);
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emit_lso(as, A64I_LDRx, tmp2, tmp1,
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(int32_t)offsetof(global_State, gc.threshold));
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emit_lso(as, A64I_LDRx, RID_TMP, tmp1,
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(int32_t)offsetof(global_State, gc.total));
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ra_allockreg(as, i64ptr(J2G(as->J)), tmp1);
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emit_getgl(as, tmp2, gc.threshold);
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emit_getgl(as, RID_TMP, gc.total);
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as->gcsteps = 0;
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checkmclim(as);
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}
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@@ -1846,6 +1883,12 @@ static void asm_loop_fixup(ASMState *as)
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}
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}
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/* Fixup the tail of the loop. */
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static void asm_loop_tail_fixup(ASMState *as)
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{
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UNUSED(as); /* Nothing to do. */
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}
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/* -- Head of trace ------------------------------------------------------- */
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/* Reload L register from g->cur_L. */
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